1. Technical Field
The present invention relates to a method of manufacturing a semiconductor device having a field-effect transistor, and the semiconductor device.
2. Related Art
There may be a case where a gate electrode of a field-effect transistor is formed of a metal material. This is intended to efficiently apply a gate voltage to a channel region to thereby improve performance of a field-effect transistor. However, when the gate electrode formed of a metal material is etched, use of a resist as a mask causes the etching rate of the mask to be higher than that of the metal material.
A method of manufacturing a field-effect transistor to which a hard mask is applied in etching of the gate electrode is disclosed in “Full-Metal-Gate Integration of Dual-Metal-Gate HfSiON CMOS Transistors by Using Oxidation-Free Dummy-Mask Process” Written by F. Ootsuka, Y. Tamura, Y. Akasaka, S. Inumiya, H. Nakata, M. Ohtsuka, T. Watanabe, M kitajima, Y. Nara and K. Nakamura: Extended Abstracts of the 2006 International Conference on Solid State Devices and Materials, Yokohama, 2006, pages 1116 to 1117 (hereinafter, simply referred to as Non-Patent Document 1). Thereby, it is possible to selectively remove the gate electrode film formed of a metal material by etching. In addition, Japanese Unexamined Patent Publication No. 2005-136376 discloses a technique in which the hard mask is formed of a two-layered film. At this time, the upper film of the films included in the hard mask is formed of a material having a high etching selectivity ratio with respect to a gate sidewall film.